/[projet1]/public/oric/demos/SlideShowDemo/code/sector_2-microdisc.asm
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Contents of /public/oric/demos/SlideShowDemo/code/sector_2-microdisc.asm

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Revision 1015 - (show annotations)
Thu Dec 12 20:53:08 2013 UTC (5 years, 11 months ago) by dbug
File size: 10086 byte(s)
Archived the latest version of the loader code.
It's still pretty much work in progress, but it would suck that my hard drive dies :p
1 ;
2 ; This part of the code is a bit tricky: Basically the Atmos with Microdisc and the Telestrat despite using a similar boot
3 ; loading system are actually loading the boot sector at different addresses.
4 ;
5 ; Since the 6502 is not particularly well equiped to handle code that can be loaded at any address we had to find a trick.
6 ; What we are doing is to make the code run at a particular address, and have a small module that makes sure that it is
7 ; moved at the correct place wherever it was loaded in first place. That makes the code a lot easier to write :)
8 ;
9 ; Warning: This whole code CANNOT be more than 256 bytes (ie: the size of the sector)
10 ;
11 ; The bootloader will be placed in the screen area because we know that this is not going to be used by the operating system.
12 ; By chosing an address in HIRES area, we also guarantee that it will not be visible on the screen (the Oric boots in TEXT).
13 ;
14 #define FINAL_ADRESS $a000+50*40
15
16
17 #define OPCODE_RTS $60
18
19
20 #define loader_track_position 0 ; Location of the loader on the disk (track number)
21 #define loader_sector_position 5 ; Location of the loader on the disk (sector number)
22
23 #include "disk_info.h"
24
25 .zero
26
27 *=$00
28
29 retry_counter .dsb 1 ; Number of attempts at loading data (ie: not quite clear what happens when this fails...)
30
31
32 .text
33
34 ;
35 ; These are the 23 header bytes that goes before the actual executable part of the bootsector
36 ;
37 .byt $00,$00,$FF,$00,$D0,$9F,$D0,$9F,$02,$B9,$01,$00,$FF,$00,$00,$B9,$E4,$B9,$00,$00,$E6,$12,$00
38
39 .text
40
41 ;
42 ; Here starts the actual executable part, maximum available size is 233 bytes (256-23)
43 ;
44
45 ;
46 ; Try to find the load address
47 ;
48 sei ; Disable interruptions
49
50 lda #OPCODE_RTS
51 sta $00 ; Write in $00 Page => take one less byte
52 jsr $0000 ; JSR on the RTS immediately return.
53
54 ;
55 ; Compute the absolute address of where the code we want to copy begins,
56 ; and save it in zero page ($00 and $01)
57 ;
58 _start_relocator_
59 tsx ; Get stack offset
60 dex
61 clc
62 lda $0100,x ; Get LOW adress byte
63 adc #<(_end_relocator_-_start_relocator_+1)
64 sta $00
65 lda $0101,x ; Get HIGH adress byte
66 adc #>(_end_relocator_-_start_relocator_+1)
67 sta $01
68
69 ; Now $00 and $01 contain the adress of LABEL
70 ; We can now copy the whole code to it's new
71 ; location
72 ldy #0
73 copy_loop
74 lda ($00),y
75 sta FINAL_ADRESS,y
76 iny
77 cpy _END_-_BEGIN_
78 bne copy_loop
79
80 jmp FINAL_ADRESS
81 _end_relocator_
82
83
84 ;
85 ; Here is some code compiled at a fixed adress in memory.
86 ;
87
88 *=FINAL_ADRESS
89
90 _BEGIN_
91 ;
92 ; Read sector data
93 ;
94 ldy #4
95 sty retry_counter
96 read_sectors_loop
97
98 readretryloop
99 nop
100 nop
101 nop
102
103 read_one_sector
104 ;
105 ; Check if we are on the correct track already and if not
106 ; then send a SEEK command to the FDC to move the head to
107 ; the correct track.
108 ;
109 ldx #loader_track_position
110 cpx FDC_track_register
111 beq track_ok
112
113 ; Write the track number in the FDC data register
114 stx FDC_data
115
116 wait_drive2
117 lda $318 ; We are waiting for the drive maybe not useful if drive is ready after the eprom boot
118 bmi wait_drive2
119
120 ;
121 ; Send a SEEK command (change track)
122 ;
123 lda #CMD_Seek
124 sta FDC_command_register
125 jsr WaitCompletion
126 track_ok
127
128 ; Write the sector number in the FDC sector register
129 __auto__sector_index
130 lda #loader_sector_position
131 sta FDC_sector_register ;
132
133 ; Interdire les IRQ du fdc ICI !
134 ;lda #%10000101 ; on force les le Microdisk en side0, drive A ... Set le bit de données !!!
135 lda #%10000100 ; on force les le Microdisk en side0, drive A ... Set le bit de données !!!
136 sta MICRODISC
137
138 ;
139 ; Send a READSECTOR command
140 ;
141 lda #CMD_ReadSector
142 sta FDC_command_register
143
144 ldy #wait_status_floppy
145 waitcommand
146 nop ; Not useful but for old Floppy drive maybe
147 nop ; Not useful but for old Floppy drive maybe
148 dey
149 bne waitcommand
150
151 ;
152 ; Read the sector data
153 ;
154 ldy #0
155 fetch_bytes_from_FDC
156 lda $0318
157 bmi fetch_bytes_from_FDC
158 lda $0313
159 __auto_write_address
160 sta location_loader,y
161
162 iny
163 bne fetch_bytes_from_FDC
164 ; Done loading the sector
165
166 lda FDC_status_register
167 and #$1C
168
169 beq sector_OK
170 dec retry_counter
171 bne readretryloop
172
173 sector_OK
174 inc __auto__sector_index+1
175 inc __auto_write_address+2
176 dec sector_counter
177 bne read_sectors_loop
178
179 ;
180 ; Data successfully loader (we hope)
181 ;
182 sei
183 lda #%10000001 ; Disable the FDC (Eprom select + FDC Interrupt request)
184 sta MICRODISC
185
186 jmp location_loader
187
188
189 ;
190 ; Command words should only be loaded in the Command Register when the
191 ; Busy status bit is off (Status bit 0). The one exception is the Force
192 ; Interrupt command. Whenever a command is being executed, the Busy status
193 ; bit is set. When a command is completed, an interrupt is generated and
194 ; the busy status bit is reset. The Status Register indicates whethter the
195 ; completed command encountered an error or was fault free. For ease of
196 ; discussion, commands are divided into four types (I, II, III, IV).
197 ;
198 WaitCompletion
199 .(
200 ldy #4
201 r_wait_completion
202 dey
203 bne r_wait_completion
204 r2_wait_completion
205 lda FDC_status_register
206 lsr
207 bcs r2_wait_completion
208 asl
209 rts
210 .)
211
212
213 sector_counter .byt nb_sectors_loader
214
215
216 _END_
217
218
219
220 ; Type I commands
221 ; The type I commands include the Restore, Seek, Step, Step-In and Step-
222 ; Out commands. Each of the Type I commands contains a rate field r1 r0
223 ; which determines the stepping motor rate.
224 ; r1 r0 Stepping rate
225 ; 0 0 6 ms
226 ; 0 1 12 ms
227 ; 1 0 20 ms
228 ; 1 1 30 ms
229 ; An optional verification of head position can be performed by settling
230 ; bit 2 (V=1) in the command word. The track number from the first
231 ; encountered ID Field is compared against the contents of the Track
232 ; Register. If the track numbers compare (and the ID Field CRC is correct)
233 ; the verify operation is complete and an INTRQ is generated with no
234 ; errors.
235 ;
236 ; Seek
237 ; This command assumes that the Track Register contains the track number
238 ; of the current position of the head and the Data Register contains the
239 ; desired track number. The FD179X will update the Track Register and
240 ; issue stepping pulses in the appropriate direction until the contents of
241 ; the Track Register are equal to the contents of the Data Register. An
242 ; interrupt is generated at the completion of the command. Note: when
243 ; using multiple drives, the track register must be updated for the drive
244 ; selected before seeks are issued.
245
246 ;
247 ; Type II commands
248 ; Type II commands are the Read Sector and Write Sector commands. Prior
249 ; to loading the Type II command into the Command Register, the computer
250 ; must load the Sector Register with the desired sector number. Upon
251 ; receipt of the Type II command, the busy status bit is set. The FD179X
252 ; must find an ID field with a matching Track number and Sector number,
253 ; otherwise the Record not found status bit is set and the command is
254 ; terminated with an interrupt. Each of the Type II commands contains an
255 ; m flag which determines if multiple records (sectors) are to be read or
256 ; written. If m=0, a single sector is read or written and an interrupt is
257 ; generated at the completion of the command. If m=1, multiple records are
258 ; read or written with the sector register internally updated so that an
259 ; address verification can occur on the next record. The FD179X will
260 ; continue to read or write multiple records and update the sector
261 ; register in numerical ascending sequence until the sector register
262 ; exceeds the number of sectors on the track or until the Force Interrupt
263 ; command is loaded into the Command Register. The Type II commands for
264 ; 1791-94 also contain side select compare flags. When C=0 (bit 1), no
265 ; comparison is made. When C=1, the LSB of the side number is read off the
266 ; ID Field of the disk and compared with the contents of the S flag.
267 ;
268 ; Read Sector
269 ; Upon receipt of the command, the head is loaded, the busy status bit set
270 ; and when an ID field is encountered that has the correct track number,
271 ; correct sector number, correct side number, and correct CRC, the data
272 ; field is presented to the computer. An DRQ is generated each time a byte
273 ; is transferred to the DR. At the end of the Read operation, the type of
274 ; Data Address Mark encountered in the data field is recorded in the
275 ; Status Register (bit 5).
276 ;
277
278
279 /*
280 From: http://www.metabarn.com/v1050/docs/v1050_ProgTechDoc.txt
281
282 During a command which performs a data transfer such as diskette
283 read or write, data must be read from or written to the diskettes
284 byte-by—byte via the Z-80A. This can be done either by polling
285 the WD1793 data request bit (DRQ, status bit 1) or by the DRQ
286 interrupt. Reading or writing the data register will reset both
287 the DRQ bit and interrupt. The total time between byte transfers
288 is 23 microseconds for 5" double density or 8" single density;
289 the polling loop or interrupt service routine must be shorter
290 than this to insure that no bytes are lost.
291
292 The diskette motors are turned on by resetting bit 6 of port A of
293 the miscellaneous 8255, and turned off by setting the same bit.
294 Our BIOS code turns the motors on, then leaves them on for two
295 seconds to save time in the case of multiple disk accesses.
296 After turning on the motors, you must wait 800 ms. to be sure
297 that the drives are up to speed before attempting to transfer
298 data. The Ready input of the WD1793 is supplied from pin 34 of
299 the drive interface; it indicates that the drive is loaded and
300 has made at least one revolution at > 50% of normal speed. Note
301 that the drive looks at the index pulse for this; if a hard-
302 sectored disk is inserted the results are invalid.
303
304 The reset line of the WD1793 is held in the reset mode by
305 hardware at power-on. A timing restriction is inherent in the
306 WD1793: after writing a command, the Z-80A must not read the
307 status register for 28 microseconds.
308
309 */

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